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CENTRAL PROCESSING UNIT

The M68HC11 CPU is optimized for low power consumption and high-performance operation at bus frequencies up to 4 MHz. Features include:

MEMORY

The M68HC11 Family leads in microcontroller memory technology. In fact, the 68HC711E9 was the first device to integrate EPROM and EEPROM technologies on the same chip. The M68HC11 Family on chip memory technology offers:

In many applications, the M68HC11 provides a single chip solution with mask programmed ROM or user-programmable EPROM. All family derivatives are also expandable for the incorporation of external memory in the design. In addition to the standard 64 Kbytes of address space, many devices offer up to six additional memory expansion to access more than 1 Mbyte.

The M68HC11 Family's RAM uses a fully static design, and the contents can be preserved during periods of processor inactivity.

One Time Programmable (OTP) and windowed EPROM versions of M68HC11 devices are offered across the family providing a cost effective, user-programmable ROM facility for small volume prototypes and development runs. Secure EPROM devices are also available for applications where code is at risk of being compromised .

The M68HC11's EEPROM is ideal for the secure storage of essential calibration, diagnostic and security information.

A 4 channel Direct Memory Access (DMA) unit on some devices permits fast data transfer between two blocks of memory (including externally mapped memory in expanded mode), between registers or between registers and memory.

SERIAL COMMUNICATIONS

The M68HC11 Family provides on chip serial communication interfaces supporting a broad range of applications, and data transfer to both local and remote peripherals. Both the synchronous Serial Peripheral Interface (SPI) and asynchronous Serial Communications Interface (SCI) have a wide range of software selectable baud rates and are optimized to minimize CPU overhead.

The SCI features a full duplex Universal Asynchronous Receiver/ Transmitter system, using the non-return-to zero (NRZ) format for microcontroller-to PC connections, or to form a serial communications network connecting several widely distributed microcontrollers. Through the SCI, the built-in bootstrap interface allows in-circuit programming, and facilitates diagnostic and test operation of your application.

The SPI is capable of inter-processor communication in a - _ multiple master system. The SPI also enables synchronous communication between the microcontroller and peripheral , devices such as:

LOW POWER OPERATION

The M68HC11 provides high performance at low power. Further power reductions can be achieved by some devices which have a Phase Locked Loop (PLL) clock synthesizer circuit.

The PLL allows clock speed reduction by switching the internal clock to a lower, power saving frequency. Additional low power operation features include:

HIGH PERFORMANCE TIMER

The industry standard M68HC11 timer provides flexibility, performance and ease of use. The system is based on a free-running 16-bit counter with a programmable prescaler, overflow interrupt, and separate function interrupts.

Additional M68HC11 timer features include:

It also provides a selection of timer sub systems geared towards timing-intensive applications; each supported by additional features associated with specific family members, including:

A/D SYSTEM

A/D systems are available with 8 to 12 channels and 8 and 10 bit resolution. The A/D is software programmable to provide single or continuous conversion modes. The M68HC11 Family now also offers D/A conversion for added versatility.

PULSE WIDTH MODULATION

The M68HC11 Family offers a selection of Pulse Width Modulation (PWM) options to support a variety of applications. Up to six PWM channels can be selected to create continuous waveforms with programmable rates and software selectable duty cycles from 0 to 100%.

MEMORY MANAGEMENT AND CHIP SELECTS

The 68HCllK4 and 68HCllCO are two devices in the family that offer memory expansion logic. The Memory Management Units (MMU) implement additional address lines that are active only when required by the CPU; the Chip Select block provides signals to simplify the interface to external devices.

MORE THAN 50 MEMBERS MAKE UP THE M68HC11 FAMILY

Within the M68HC11 Family, there are nine major series of micro controller units; each is composed of many related devices. The following are examples of the features the M68HC11 can offer as shown through specific devices within each series:

A-series

The 68HC11A8 is an advanced 8 bit MCU featuring 8 Kbytes ROM, 256 bytes of RAM. 512 bytes of EEPROM, sophisticated on chip peripheral and a nonimal bus speed of 3 MHz. Included is an eight channel A/D converter with eight bits of resolution.

D series

The 68HC11D3 chip with 4 Kbytes ROM offers an economical alternative for applications when advanced 8-bit performance is required with fewer peripherals and less memory.

E-series

In this series, the 68HC11E9's extremely flexible I/0 capability allows facilities to be configured to best match the application. It was the first in the family to combine EEPROM and EPROM on a single chip. The E-series offers multiple memory sizes in a pin compatible package.

F-series

High-speed expanded systems required the development of the 68HC11Fl. This particular chip series stands out with its extra l/O ports, an increase in static RAM (1 Kbyte), chip selects, and a 4 MHz non-multiplexed bus.

G series

The 68HC11G5 is the first family member to offer 10 bit A/D resolution This series also includes the most sophisticated timer systems in the family.

K-series

Of these very high performance devices, the 68HC11K4 offers high speed, large memories, an MMU, PWMs and plenty of 1/0.

L-series

The 68HC11L6 is a high-speed, low-power chip with a multiplexed bus capable of operation up to 3 MHz. The L6's high performance design is based on the 68HCllE9. It includes 16 Kbytes of ROM, plus an additional bidirectional port. Its fully static design allows operation at frequencies down to dc.

M-series

These enhanced, high-performance microcontrollers are derived from the 68HCllK4 and include large memory modules, a 16 bit math coprocessor, and 4 channels of DMA.

P-series

The 68HC11P2 offers a power saving programmable PLL- based clock circuit along with many 1/0 pins, large memory and 3 SCI ports. All M68HC11 Family members have on chip SCI and SPI, and most have EEPROM and an A/D converter.

DEVELOPMENT SUPPORT

The M68HC11 Family is supported by dozens of independent development tool suppliers with a variety of hardware and software development tools including: emulators, logic analyzers, programmers, evaluation boards, simulators, C compilers, real-time operating systems, assemblers, and debuggers - all allowing you to effeciently develop, monitor, test and debug your code to get your applications up and running fast. Hardware tools from Motorola include: A real-time in-circuit emulator, bus state analyzer and control station for debugging hardware and software of 68HCll-based systems.

M C U - SPECIFIC EVALUATION SYSTEMS ( E V S )

The EVS is a two-board system consisting of a 68HC11 Plafform Board (PFB) and an Emulator Module (EM) which contains the control circuits and a 68HC11 MCU for the part or series of parts being emulated. The EMs can be used with both the M68MMDS11 and the M68HC11EVS. EVSs provide expanded-mode, special test, and single chip mode emulation; is, a dual 64 Kbyte memory map with 64 Kbytes of emulation, and an RS 232 port.

THE M68SPGMR11 SERIAL PROGRAMMER

Program your own code into 68HC11 microcontrollers with on chip EPROM and EEPROM. Programming software is included. A variety of easily interchangeable programming adapters for use with different microcontrollers and packages are available.

EVALUATION BOARDS (EVB)

Our low cost EVBs debug code under the Bit User Fast Friendly Aid to Logical Operations (BUFFALO) monitor/debugging program contained in the microcontroller ROM. The EVB has no EPROM programmer. The EVBU, a condensed "universal" version of the EVB, emulates only single chip mode operations and includes a wire-wrap area for custom interfacing.


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Last updated: June 18, 1996